Science/Engineering Defect-Oriented Testing for Nano-Metric CMOS VLSI Circuits (Frontiers in Electronic Testing) (0387465464)

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More Defect-Oriented Testing for Nano-Metric CMOS VLSI Circuits (Frontiers in Electronic Testing) By: Manoj Sachdev José Pineda de Gyvez

ISBN-10: 0387465464 ISBN-13: 9780387465463

Publisher: Springer - 2007-06-21

Editorial Review: Failures of nano-metric technologies owing to defects and shrinking process tolerances give rise to significant challenges for IC testing. As the variation of fundamental parameters such as channel length, threshold voltage, thin oxide thickness and interconnect dimensions goes well beyond acceptable limits, new test methodologies and a deeper insight into the physics of defect-fault mappings are needed. In Defect-Oriented Testing for Nano-Metric CMOS VLSI Circuits state of the art of defect-oriented testing is presented from both a theoretical approach as well as from a practical point of view. Step-by-step handling of defect modeling, defect-oriented testing, yield modeling and its usage in common economics practices enables deeper understanding of concepts. The progression developed in this book is essential to understand new test methodologies, algorithms and industrial practices. Without the insight into the physics of nano-metric technologies, it would be hard to develop system-level test strategies that yield a high IC fault coverage. Obviously, the work on defect-oriented testing presented in the book is not final, and it is an evolving field with interesting challenges imposed by the ever-changing nature of nano-metric technologies. Test and design practitioners from academia and industry will find that Defect-Oriented Testing for Nano-Metric CMOS VLSI Circuits lays the foundations for further pioneering work.

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	Defect-Oriented Testing for Nano-Metric CMOS VLSI Circuits Manoj Sachdev, José Pineda de Gyvez, "Defect-Oriented Testing for Nano-Metric CMOS VLSI Circuits"Springer; 2nd ed. edition (June 21, 2007) \| ISBN: 0387465464 \| 328 pages \| PDF \| 5,5 MbFailures of nano-metric technologies owing to de ...
	Science/Engineering Emerging Nanotechnologies: Test, Defect Tolerance, and Reliability (Frontiers in Electronic Testing) Emerging Nanotechnologies: Test, Defect Tolerance, and Reliability By Mohammad TehranipoorPublisher: Springer \| Pages:408 \| 2007-12-10 \| ISBN: 038774746X \| PDF \| 8 MBProduct Description: Emerging Nanotechnologies: Test, Defect Tolerance and ...
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	Technical Emerging Nanotechnologies: Test, Defect Tolerance, and Reliability (Frontiers in Electronic Testing) (Frontiers in Electronic Testing) Author: Publisher: Springer (2007)Binding: Hardcover, 408 pagespricer: $169.00ISBN-10: 038774746XeditorialreviewsEmerging Nanotechnologies: Test, Defect Tolerance and Reliability covers various technologies that have been developing over th ...
	Technical CMOS SRAM Circuit Design and Parametric Test in Nano-Scaled Technologies: Process-Aware SRAM Design and Test (Frontiers in Electronic Testing) (Frontiers in Electronic Testing) Author: Manoj Sachdev, Andrei PavlovPublisher: Springer (2008)Binding: Hardcover, 212 pagespricer: $149.00ISBN-10: 1402083629editorialreviewsAs technology scales into nano-meter region, design and test of Static Random Access Memories (SRAM ...

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