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PCI was originally designed to be used in a wide range of systems from notebooks to high-end servers. There are now a wide range of new buses being developed to replace PCI, which enable cost-savings, performance enhancement, and specialized features. HyperTransport is a new bus that deals specifically with chipset interconnect, the high-speed link between the memory and IO controller chips. HyperTransport Architecture allows hardware and low-level software designers, engineers, and technicians to get up to speed quickly on this new bus protocol, without having to wade through specifications and white papers. The book organizes topics in a logical, tutorial format which quickly guides the reader through the major features of the specification. Numerous diagrams and examples reduce the more complicated concepts to manageable proportions and allow the reader to see the important relationships along the way.

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