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Technical Functional Verification of Programmable Embedded Architectures: A Top-Down Approach
Posted on 2010-04-28
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Author: Prabhat Mishra, Nikil D. Dutt
Publisher: Springer (2005) Binding: Hardcover, 180 pages pricer: $129.00 ISBN-10: 0387261435 editorialreviews Validation of programmable architectures, consisting of processor cores, coprocessors, and memory subsystems, is one of the major bottlenecks in current System-on-Chip design methodology. A critical challenge in validation of such systems is the lack of a golden reference model. As a result, many existing validation techniques employ a bottom-up approach to design verification, where the functionality of an existing architecture is, in essence, reverse-engineered from its implementation. Traditional validation techniques employ different reference models depending on the abstraction level and verification task, resulting in potential inconsistencies between multiple reference models. This book presents a top-down validation methodology that complements the existing bottom-up approaches. It leverages the system architect
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