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Technical Design for Manufacturability and Yield for Nano-Scale CMOS (Series on Integrated Circuits and Systems)

Posted on 2010-04-28




Name:Technical Design for Manufacturability and Yield for Nano-Scale CMOS (Series on Integrated Circuits and Systems)
ASIN/ISBN:1402051875
Author:Charles Chiang, Jamil Kawa
Publisher:Springer (2007)
Pages:Hardcover, 254 pages
File size:26 Mb
   Technical Design for Manufacturability and Yield for Nano-Scale CMOS (Series on Integrated Circuits and Systems)


Author: Charles Chiang, Jamil Kawa


Publisher: Springer (2007)


Binding: Hardcover, 254 pages


pricer: $119.00


ISBN-10: 1402051875


editorialreviews

Design for Manufacturability and Yield for Nano-Scale CMOS walks the reader through all the aspects of manufacturability and yield in a nano-CMOS process and how to address each aspect at the proper design step starting with the design and layout of standard cells and how to yield-grade libraries for critical area and lithography artifacts through place and route, CMP model based simulation and dummy-fill insertion, mask planning, simulation and manufacturing, and through statistical design and statistical timing closure of the design. It alerts the designer to the pitfalls to watch for and to the good practices that can enhance a design

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