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Science/Engineering Power Estimation and Optimization Methodologies for VLIW-based Embedded Systems

Posted on 2010-03-15




Name:Science/Engineering Power Estimation and Optimization Methodologies for VLIW-based Embedded Systems
ASIN/ISBN:1402073771
Language:English
File size:4.8 Mb
Publish Date: 2003-02
ISBN: 1402073771
Pages: 201 pages
File Type: PDF
File Size: 4.8 MB
Other Info: Springer
   Science/Engineering Power Estimation and Optimization Methodologies for VLIW-based Embedded Systems

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Vittorio Zaccaria, M.G. Sami, Donatella Sciuto, Cristina Silvano,

"Power Estimation and Optimization Methodologies for VLIW-based Embedded Systems"


The main contribution of Power Estimation and Optimization Methodologies for VLIW-based Embedded Systems consists of the introduction of innovative power estimation and optimization methodologies to support the design of low power embedded systems based on high-performance Very Long Instruction Word (VLIW) microprocessors. A VLIW processor is a (generally) pipelined processor that can execute, in each clock cycle, a set of explicitly parallel operations; this set of operations is statically scheduled to form a Very Long Instruction Word.

The proposed estimation techniques are integrated into a set of tools operating at the instruction level and they are characterized by efficiency and accuracy. The aim is the definition of an overall power estimation framework, from a system-level perspective, where novel power optimization techniques can be evaluated.

The proposed power optimization techniques are addressed to the micro-architectural as well as the system level. Two main optimization techniques have been proposed: the definition of register file write inhibition schemes that exploit the forwarding paths, and the definition of a design exploration framework for an efficient fine-tuning of the configurable modules of an embedded system.

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